PHY_CLK_ON=0
PHY CONFIGURATION REGISTER 2
PHY_FIFO_PRECHG | PHY FIFO Precharge Level |
RFU03 | Reserved for future use. |
RFU04 | Reserved for future use. |
RFU05 | Reserved for future use. |
RFU06 | Reserved for future use. |
X2_DEMOD_GAIN | X2_DEMOD_GAIN |
RFU07 | Reserved for future use. |
RFU08 | Reserved for future use. |
RFU09 | Reserved for future use. |
RFU10 | Reserved for future use. |
RFU11 | Reserved for future use. |
RFU12 | Reserved for future use. |
RFU13 | Reserved for future use. |
RFU14 | Reserved for future use. |
RFU15 | Reserved for future use. |
RFU16 | Reserved for future use. |
PHY_CLK_ON | Force PHY Clock On (testmode) 0 (0): PHY clock is enabled by TSM output: rx_phy_en 1 (1): PHY clock is forced on at all times |